RFEL Creates Flexible Design Emulation of Texas InstrumentsTM Graychip GC1012B Wideband DDC
RFEL Creates Flexible Design Emulation of Texas InstrumentsTM Graychip GC1012B Wideband DDC
  • Korea IT Times (info@koreaittimes.com)
  • 승인 2012.03.13 17:30
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NEWPORT, ISLE OF WIGHT, UK — As a number of Texas Instruments Graychip (GC) range of devices transition to "Not Recommended" for new designs and "Obsolete" status, RFEL has, in response to customer requests, developed specific IP to emulate the signal processing functionality of these devices and thereby provide an upgrade path to designs originally built upon them. Using specifically designed sub-modules a channelized design can be realized on an FPGA platform, that offers higher performance, greater customization options and a lower price than the increasingly hard to obtain mature Graychip devices.

GC1012B Emulation Block Diagram

"Manufacturers are coming to the stage of designing the next generation of their products only to find that a key component they had used, such as the TI Graychip GC1012A has become obsolete, and the GC1012B wideband DDC is 'not recommended' for new designs, hard to obtain and expensive at around USD 240 each" explained Dr Alex Kuhrt, RFEL's CEO. "At the request of customers, we have created emulations of the DDC functionality, using our award winning DSP technology that runs on a low-cost FPGA part and delivers improved performance and lower system costs, saving a massive 75% on the effective unit cost."

The designs are not pin-for-pin replacements, but, as companies design new PCB layouts for their next generation of products, it is a straight-forward process to take advantage of the increased performance, lower power consumption and extended features on offer, such as support for fractional decimation factors up to 16,384 as standard - a capability not even offered by many of the latest DDC chips.

The first design available delivers the equivalent functionality of a GC1012B device, but can process higher sample rates and provides one additional output as standard, with more available on request. A comparison is shown in Table 1:

Dr Kuhrt concluded, "One of the many advantages of our IP approach is that we can easily migrate our implementation from one generation of FPGA to the next and to different manufacturers, while ensuring functional compatibility, and that the most optimal design techniques available are utilized. This is important for products developed for EW and counter-intelligence, for example, which are always pushing the envelope to be able to detect and identify many different kinds of radio signals from an ever widening frequency range and increasingly cluttered spectrum."


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