LEUVEN, BELGIUM - At this week’s VLSI 2013 Technology Symposium 2013 (Kyoto, Japan, June 11-13, 2013), imec presented important findings increasing the understanding into the stochastic nature of Resistive Random Access Memory (RRAM) operation. Imec’s results are crucial steps forward to enable reliable implementation of the memory concept.
Current (Flash) memory technologies are believed to face scaling limitations down to the 15-16nm technology node. One of today’s most promising concepts for scaled memory is RRAM which is based on the electronic (current-or voltage-induced) switching of a resistor element material between two metal oxides. Imec’s research efforts on RRAM tackle scalability, low-voltage/low-current operation, as well as understanding the operation mechanisms and reliability optimization of this memory concept.
At VLSI 2013, imec researchers presented an improved quantitative statistical prediction of the RRAM operation by adding a stochastic component in their previously described Hourglass concept, a model that facilitates RRAM cell design. The optimized model is used to suggest engineering guidelines for stable operations in filamentary RRAM.
One of the critical reliability parameters impacting the memory state during read operation in resistive memory is Random Telegraph Noise (RTN). At VLSI 2013, imec presented a study showing impact of filament configuration on the RTN signal. This analysis helped in proposing guidelines to engineer the dielectric for reduced RTN effects in low operating power.
Low-current operation is another critical parameter to enable dense memory applications. Imec characterized extensively the sub-1µA operation of scaled RRAM cell with bilayer HfO2/Al2O3 to address the all challenges related to low operating current such as increased variability and speed and retention limitations.
According to Gosia Jurczak, director of imec’s emerging memory device program: “With these excellent results, we continue to prove our leadership in research on Resistive RAM concepts and provide better understanding of the RRAM operations and its fundamental limitations.”
These results were obtained in cooperation with imec’s key partners in its core CMOS programs including GLOBALFOUNDRIES, INTEL, Micron, Panasonic, Samsung, TSMC, Elpida, SK hynix, Fujitsu, Sony, and others.
