Intel / 70Mb SRAM Chip
Intel / 70Mb SRAM Chip
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  • 승인 2004.10.01 12:01
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65-Nanometer Process Technology Extends Benefits of Moore's Law

Intel (www.intel.com) has developed next-generation chip manufacturing technology by building fully functional 70- megabit static random access memory (SRAM) chips with more than half a billion transistors. The new chips were manufactured using the world's most advanced 65- nanometer (nm) process technology. The achievement extends Intel's efforts to develop new manufacturing process technology every two years, in accordance with Moore's Law.

The transistors in the new 65-nm (a nanometer is one-billionth of a meter) technology have gates (the switch that turns a transistor on and off) measuring 35 nm, approximately 30 percent smaller than the gate lengths on the earlier 90-nm technology. About 100 of these gates could fit inside a human red blood cell.

The new process technology increases the number of tiny transistors squeezed onto a single chip, providing the foundation on which to deliver future multicore processors. It will also enable Intel to design innovative features into future products, including virtualization and security capabilities. This new 65-nm process technology also includes several unique power-saving and performance-enhancing features.

In November 2003, Intel used 65-nm process to build 4-megabit SRAMs, and has since then fabricated fully functional 70- megabit SRAMs on this process with a very small die area of 110 mm2 (see photo above). Small SRAM cells allow for the integration of larger caches in processors, increasing performance. Each SRAM memory cell has six transistors packed into an area of 0.57m2 (see photo below). Some 10 million of these transistors could fit in one square millimeter, roughly the size of the tip of a ball point pen.


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