Teledyne e2v granted two keynote presentations at China’s Electronic Design Innovation Conference
Teledyne e2v granted two keynote presentations at China’s Electronic Design Innovation Conference
  • By Yeon Je-hyun (
  • 승인 2017.04.28 17:32
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Marc Stackler present his technical paper at EDI CON.

For the first time in Shanghai, Teledyne e2v has been a Bronze Sponsor at the world famous EDI CON China and presented 2 key topics, discussing key design solutions and interfacing FPGAs and data converters in high performance applications.

Teledyne e2v's Field Application Engineer for the Asia Pacific region, Marc Stackler, presented two papers at EDI CON this week to an audience of over a hundred electronic design specialists during the event's technical conference. Discussing key system design points and the benefits of the two main high-speed interfacing techniques , Mr. Stackler gave the audiences a deeper understanding of the benefits and limitations of both parallel and serial interfaces using real-time examples of high performance applications.

According to press of Media OutReach on April 28 that the evolution of ultra-wideband (UWB) data converter technologies continues to attract more applications that are looking to them as a solution to improve, by an order of magnitude, the performance and capabilities of their systems; including military, industrial, test and measurement and earth observation applications. Each of these application domains brings its own constraints and requirements, so choosing the right interface is critical to achieving the highest possible system performance and Mr. Stackler elaborated on each interface and their most suited applications.

Parallel interfaces benefit low latency applications, historically best serving electronic warfare applications where a few nanoseconds can mean the difference between being identified or remaining undetected by enemy radars. Today, parallel interfaces are being replaced by serial interfaces due to the improved bandwidth capabilities and PCB board space savings they provide, but due to required encoding/decoding stages, have a higher latency than parallel interfaces. Mr. Stackler's papers and presentations dug deeper into the technical setup and benefits to both parallel and serial interfaces and the applications they best serve, all of which can be found on EDI CON's website.

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